Biography

Jyotika Athavale is the 2023 President-Elect of the IEEE Computer Society. She is an experienced leader and influencer in emerging technologies and international standardization initiatives. She was awarded the IEEE Computer Society Golden Core Award in 2022. Jyotika chairs the IEEE P2851 Standard on Functional Safety interoperability.

With over 25 years of industry experience, Jyotika is currently a senior technical leader in automotive functional safety at NVIDIA, and is driving capability development, safety architectures and methodologies, system safety engineering activities and pathfinding for safety critical markets such as autonomous driving and avionics. Prior to NVIDIA, she was Principal Engineer (Director) at Intel Corporation where she led functional safety platform architectures for Automotive and Avionics use cases and drove methodologies for radiation effects modeling and product qualification activities.

Outside of IEEE, Jyotika is actively influencing several international standardization initiatives on functional safety with ISO, SAE and UL. She also serves on various technical conference committees, has authored patents and many technical publications in IEEE conferences and journals. She received her MS degree in Electrical Engineering in 1996 from Iowa State University.

Intel Corporation

Email: jathavale@nvidia.com

DVP term expires December 2023

---

Presentations

Functional Safety and Soft Error Rate Modeling for Deep Learning Applications

Compliance to FuSa metrics and SER requirements pose challenges for safety critical systems. This talk will focus on soft error rate modeling for functional safety, with a focus on product vulnerability factors for AI and Deep Learning applications. It will describe different considerations and approaches for derating, based on workloads, and will highlight methodologies to architect and design for transient reliability and safety in the context of artificial intelligence.

 

Chip-Level Considerations to Enable Dependability for eVTOL and Urban Air Mobility Systems

Weight, energy consumption and performance are critical drivers in future mass-produced eVTOLs (electrically powered Vertical Take-Off and Landing aircraft) worldwide. The quest to rapidly integrate and certify modern COTS compute and communications technology will be a central goal of modern avionics OEMs combining new technologies, like cloud-center-like integration and acceleration like AI, to create new functionality necessary for the Urban Air Mobility (UAM) revolution. The cost savings in COTS, to be fully recognized, will require a new perspective on how functionality is partitioned, how power-efficient and safe/secure performance is facilitated by multicore processors (MCP) and how the HW/SW certification processes can be streamlined to allow the industry to easily absorb the latest innovations.
This presentation will describe some current and future trends that affect air traffic control systems and UAM avionics, including impacts on Air Traffic Control (ATC) and will present how new ATC and UAM avionics architectures, technology enablers in general and how UAM profit from specific technology from different chip vendors.

 

Technology Challenges for Functional Safety and Real Time Coexistence

This presentation establishes a common ground for the coexistence of functional safety and temporal requirements for safety-critical systems built on complex multiprocessor hardware. Although studied for many years, this problem is rapidly increasing in importance and far from being solved. The talk will include real-world use cases which highlight requirements and design challenges that system integrators face when building such complex software-defined systems, and how they complicate system validation and certification. Armed with that, we discuss potential solutions and how chip vendors can help its customers achieve their product goals.