Software-only solutions for preventing attackers from exploiting memory errors face two problems:
- They are too expensive to be broadly deployed.
- They are prone to circumvention.
These issues have motivated researchers to explore how to build and implement more reliable, efficient defensive features in hardware.
Exploring Hardware Security Approaches
The ongoing research efforts into the development, use, and evaluation of security-related hardware features and techniques are examined in a recent special issue of IEEE Security and Privacy magazine.
In their introduction to the issue, “The Impact of Emerging Hardware on Security and Privacy,” guest editors Trent Jaeger, Brent ByungHoon Kang, Nele Mentens, and Cynthia Sturton note several new hardware approaches to improving software security, including
- Fine-grained control of memory access, such as Intel’s memory protection extensions (MPKs) and extended page-table (EPT) switching
- Trusted execution environments (TEEs) that reduce dependence on complex systems software, which can be prone to memory errors
- Components that provide a fundamental root of trust (RoT) for systems.
However, as the editors point out, in the latter case, component complexity can result in flaws that prevent RoTs from achieving their security goals.
Other Outstanding Challenges
Introducing new hardware features to support robust system security also entails other issues:
- Software must be developed to use these new hardware features effectively if the desired security goals are to be achieved with low overhead. This, in turn, will facilitate the broad adoption of the hardware needed to reduce widespread memory error exploitation.
- Researchers must ensure that proposed solutions do not present new vulnerabilities that adversaries can exploit to circumvent security enforcement. New features might include blind spots, for example, that create additional attack surfaces that require additional defenses.
Four Studies of Hardware Features
The special issue includes four articles; the first two examine fine-grained memory access control mechanisms:
- In “Memory Protection Keys: Facts, Key Extension Perspectives, and Discussions,” Soyeon Park, Sangho Lee, and Taesoo Kim assess Intel’s MPK hardware and identify challenges in its design. They also discuss how to mitigate other challenges to enable broader MPK usage.
- “The Opportunities and Limitations of Extended Page Table Switching for Fine-Grained Isolation,” by Vikram Narayanan and Anton Burtsev, examines EPT switching and design decisions that ensure isolation is correctly enforced.
The issue’s other two articles spotlight the design and use of hardware RoT systems:
Dig Deeper
Examining these articles can give privacy and security researchers insights into the new capabilities and limitations of emerging hardware features, as well as how to use them and improve on them in future work.
To read the full introduction to this special issue, see “The Impact of Emerging Hardware on Security and Privacy.”
